OGD1 map guide
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Click on a component to get some infos
A) DVI transmitter pair A
Datasheet:
http://www.siliconimage.com/docs/SiI-DS-0086.pdf
Pin out list :
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B) DVI transmitter pair B
Datasheet:
http://www.siliconimage.com/docs/SiI-DS-0086.pdf
Pin out list :
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C) 330MHz triple 10-bit DAC (behind)
Datasheet:
http://www.semiconductors.philips.com/acrobat/datasheets/TDA8777_4.pdf
Pin out list :
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D) TV chip
Datasheet:
http://www.conexant.com/servlets/DownloadServlet/101900B.pdf?FileId=1812
Pin out list :
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E) 2x4 256 megabit DDR SDRAM (front, behind)
Datasheet:
http://www.samsung.com/Products/Semiconductor/DDR_DDR2/DDRSDRAM/Component/256Mbit/K4H561638F/ds_k4h56xx38f_tsop2_rev14.pdf]
A simulation model for the chip we're using,here:
http://www.samsung.com/Products/Semiconductor/DDR_DDR2/DDRSDRAM/Component/256Mbit/K4H561638F/k4h561638f_0501.tar
How to configure it
Pin out list :
http://www.traversaltech.com/ogd1_images/ogd1_memory_pins.ods
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F) ECP2-50 FPGA (main chip)
Datasheet:
Lattice ECP22 ECP2-50. http://latticesemi.com/documents/LatticeECP2_HB.pdf
Xilinx Sparten XC3s4000 http://www.xilinx.com/bvdocs/publications/ds099.pdf
About the Xilinx Sparten alternative
Pin out list :
How to do it
Verilog and EDIF netlists for the OGD1 board can be found here:
http://www.traversaltech.com/ogd1_images/ogd1_netlist.zip
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G) XP6 FPGA (host interface)
Datasheet:
http://www.latticesemi.com/dynamic/view_document.cfm?document_id=9418
Pin out list :
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H) SPI PROM 1Mbit
Datasheet:
http://www.sst.com/downloads/datasheet/S71233.pdf
Pin out list :
J) SPI PROM 16Mbit
Datasheet:
http://www.sst.com/downloads/datasheet/S71271.pdf
Pin out list :
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K) 3x 500MHz DACs (optional)
Datasheet:
http://pdfserv.maxim-ic.com/en/ds/MAX5886.pdf
Pin out list :
L) 64-bit PCI-X edge connector
Datasheet:
Pin out list :
M) DVI-I connector A and connector B
Datasheet:
Pin out list :
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N) S-video connector
Datasheet:
Pin out list :
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O) 100-pin expansion bus connector
Datasheet:
Pin out list :
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